Digital systems are used extensively in a vast array of applications including computation, data processing, control systems, communications, imagery and the like. These digital systems are generally constructed through the interconnection of standard logic circuits, each of which performs arithmetic or information control functions.
The logic circuit is generally a two-state device; that is, the output can assume only two different discrete values in response to voltage inputs corresponding to binary levels of "0" and "1". The conventional logic circuit is implemented using standard analog devices such as resistors, diodes and transistors integrated onto a single substrate to form gates, flip-flops, and other logic functions.
One of the most widely used logic circuits is an inverter. A simple inverter can be constructed using an n-channel enhancement mode Metal Oxide Semiconductor Field Effect Transistor (MOSFET) formed with a p-type substrate. In this embodiment, the drain is connected through a load to a power source and the source is connected to ground. The gate serves as the inverter input.
In operation, when a positive threshold voltage is applied to the gate, a conductive channel is formed between the source and drain providing a low impedance path between the load and ground. Conversely, when the gate voltage is below the threshold voltage, no conductive channel is formed and the load is pulled up toward the power source voltage.
Using the inverter as a basic building block, more complicated logic circuits can be constructed. By way of example, a three input NOR gate can be implemented by connecting three n-channel enhancement mode MOSFETs in parallel with the drains pulled-up to the power source through the load and the sources connected to ground. A low impedance path is created between the load and ground when a positive threshold voltage is applied to the gate of any one of the MOSFETs. Conversely, when all gate inputs are below the threshold voltage with respect to the source, the load output is pulled-up toward the power source voltage.
This implementation, however, suffers from several serious drawbacks. First, the low level voltage level (V.sub.OL) varies depending on the number gate inputs exceeding the threshold voltage. As the number of conductive channels increase, the impedance path from the load to ground correspondingly decreases resulting in a lower output voltage. The lower output voltage results in an increased rise time when the gate inputs are simultaneously switched to a voltage level below the threshold because the output has to swing over a larger voltage range. Moreover, the power consumption increases as more conductive channels are induced since a larger current is drawn through the lower impedance path.
Second, since the conductance of the load does not decrease in any substantial amount in response to the gate inputs to the MOSFETs, the load reduces the fall time of the output when a threshold voltage is applied to any of the MOSFET devices. Conversely, when the gate inputs to all the MOSFETs are below the threshold voltage, the rise time suffers because the conductance of the load does not correspondingly increase. Hence, the conventional logic circuits are simply too slow for many high speed applications.
Accordingly, a current need exists for a logic circuit which has a substantially constant low level output voltage V.sub.OL independent of the number of gate inputs which exceed the threshold voltage. Moreover, it is desirable that this logic circuit have a fast response time and reduced power consumption than other conventional logic circuits.